Catalog / SystemVerilog Cheatsheet
SystemVerilog Cheatsheet
A concise reference for SystemVerilog syntax and constructs, covering data types, operators, procedural statements, and verification features.
Data Types & Declarations
Basic Data Types
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Two-state type, can be 0 or 1. Preferred for synthesizable designs. |
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Historically used for sequential logic outputs; now largely replaced by |
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Two-state, unsigned data type. |
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32-bit signed integer. |
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64-bit floating-point number. |
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64-bit unsigned integer representing simulation time. |
Arrays
Fixed-size array |
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Dynamic array |
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Associative array |
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User-Defined Types
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Operators & Expressions
Arithmetic Operators
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Addition, subtraction, multiplication, division, modulo. |
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Exponentiation. |
Logical Operators
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Logical AND, OR, NOT. Operates on boolean values (1 or 0). |
Bitwise Operators
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Bitwise AND, OR, XOR, NOT. Operates on individual bits. |
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Bitwise NAND, NOR, XNOR. |
Reduction Operators
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Reduction AND, OR, XOR. Operates on all bits of a vector to produce a single-bit result. |
Shift Operators
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Logical left shift, logical right shift, arithmetic left shift, arithmetic right shift. |
Comparison Operators
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Equality, inequality, case equality, case inequality. Case equality considers X and Z. |
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Greater than, less than, greater than or equal to, less than or equal to. |
Procedural Statements
Sequential Blocks
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Combinational logic block. Re-evaluates whenever any of its inputs change. |
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Sequential logic block. Used for describing flip-flops and registers. |
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Latch inferrence. Avoid using latches in synchronous design. |
Conditional Statements
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Loop Statements
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Task and Function
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Can consume simulation time. Can have input, output, and inout arguments. |
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Cannot consume simulation time. Returns a single value. Can only have input arguments. |
Verification Features
Assertions
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Checks if a property holds true. Can be used for functional coverage. |
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Collects coverage information based on property evaluation. |
Constrained Random Verification
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Specifies that a variable should be randomized. |
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Defines constraints that the random values must satisfy. |
Coverage
Functional Coverage |
Measure of how well the design’s functionality has been exercised during verification. Check |